Switched Redundancy and Cutset Approach to Estimate Basic Probability Indices of Interleaved DC-DC Boost Converter

shashavali Palthur, Sankar Velamury

Abstract


Power Electronic Converter play a vital role in renewable energy systems in particular with solar PV systems. The DC voltage generated from the solar irradiation need to be stepped up using Boost Converters to the desired level and then inverted for AC outputs. In the context, reliability analysis of Conventional Boost Converter and Interleaved Boost Converter will be of prime concern. In this existing literature, component failure rate has been obtained. However, converter reliability analysis has not been dealt with. In this paper, Switched Mode Redundancy concept is applied along with the cutset approach for computation of basic probability indices such as Equivalent Failure Rate, Mean Outage Time and Average Annual Outage Time for these two converters. Further, the probabilistic measures such as Mean- Time-To- Failure, Mean- Time-To-Repair, Mean Time Between Failures, Availability and Unavailability are also evaluated for the above two converter configurations with malfunctioning aspects of the MOSFET, which is not dealt with in the literature.MOSFET as a switch is considered to be malfnctioning, if it is possible to get switched on when not required and not functioning when it is required. The proposed method is analyzed taking the converter configurations with MOSFET which can be used for high power and medium switching frequency applications. The results obtained are analyzed and presented for Conventional Boost Converter and Interleaved Boost Converter with malfunctioning and Non-malfunctioning aspects using MOSFET which is treated as a switch. It is  observed that inspite of IBC has better performance as compared to that of the CBC, the probabilistic measures will be decreasing, which is realistic.


Keywords


Interleaved Boost Converter, Cutset, Switched Redundancy, Basic Probability Indices, Prababilistic Mesures, Failure rate, Probabilistic Logic Diagram.

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References


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DOI (PDF): https://doi.org/10.20508/ijrer.v11i3.12188.g8287

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